The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2012

Filed:

Dec. 03, 2009
Applicants:

Kuo-chin Chiu, Hsinchu, TW;

Chih-feng Huang, Chupei, TW;

Inventors:

Kuo-Chin Chiu, Hsinchu, TW;

Chih-Feng Huang, Chupei, TW;

Assignees:

Richpower Microelectronics Corporation, Grand Cayman, British Indian Ocean Territories, KY;

Richtek Technology Corporation, R.O.C., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H02J 7/04 (2006.01); H02J 7/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention discloses an integrated PMOS transistor and Schottky diode, comprising a PMOS transistor which includes a gate, a source, a drain and a channel region between the source and drain, wherein the source, drain and channel region are formed in a substrate, and a parasitic diode is formed between the drain and the channel region; and a Schottky diode formed in the substrate and connected in reverse series with the parasitic diode, the Schottky diode having one end connected with the parasitic diode and the other end connected with the source.


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