The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2012
Filed:
Jul. 11, 2007
Engling Yeo, Milpitas, CA (US);
Eugene Pan, Milpitas, CA (US);
Henri Sutioso, San Jose, CA (US);
Jun Xu, Milpitas, CA (US);
Shaohua Yang, San Jose, CA (US);
Panu Chaichanavong, Mountain View, CA (US);
Gregory Burd, San Jose, CA (US);
Zining Wu, Los Altos, CA (US);
Engling Yeo, Milpitas, CA (US);
Eugene Pan, Milpitas, CA (US);
Henri Sutioso, San Jose, CA (US);
Jun Xu, Milpitas, CA (US);
Shaohua Yang, San Jose, CA (US);
Panu Chaichanavong, Mountain View, CA (US);
Gregory Burd, San Jose, CA (US);
Zining Wu, Los Altos, CA (US);
Marvell International Ltd., Hamilton, BM;
Abstract
A decoder system comprises a tensor-product code (TPC) decoder that decodes a received data stream to generate a decoded signal. A mark module that replaces low-density parity check (LDPC) parity bits of the decoded signal with 0s to generate a reset output signal. A deinterleave module deinterleaves error correction parity bits that are within the reset output signal to generate a deinterleaved signal that comprises a decoded portion and a concatenated portion. The concatenated portion comprises the error correction parity bits. A parity decoder module removes the concatenated portion from the deinterleaved signal.