The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2012
Filed:
Jul. 25, 2008
Jeff Dunnihoo, Bertram, TX (US);
Richard Kimoto, Fremont, CA (US);
Jeff Dunnihoo, Bertram, TX (US);
Richard Kimoto, Fremont, CA (US);
Semiconductor Components Industries, LLC, Phoenix, AZ (US);
Abstract
The present invention relates to a method and apparatus of providing 2-stage ESD protection for high-speed interfaces. An aspect of the present invention is to provide an integrated multi-stage ESD/EOS protection solution for such high-speed applications. In one embodiment, the ESD protection device has multiple ESD stages integrated into a single integrated circuit package and is mounted to a printed circuit board in series with a device under protection. In another embodiment the multiple ESD stages integrated into a single integrated circuit package of the ESD protection device are coupled with a series element that isolates a 2nd stage from a 1st stage during an ESD event, thus ensuring that the 2stage turns on before the 1stage, as well as provides for less current in the 2stage.