The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2012

Filed:

Nov. 23, 2009
Applicants:

Shuang-shuang Qin, Taipei, TW;

Cheng-wei Huang, Taipei, TW;

Inventors:

Shuang-Shuang Qin, Taipei, TW;

Cheng-Wei Huang, Taipei, TW;

Assignee:

Via Technologies, Inc., New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/00 (2006.01); G06F 3/038 (2006.01); G06F 17/00 (2006.01); G06F 15/00 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power management method for use in a computer system having a processor, a power management module and a phase lock loop circuit (PLL) is provided. The power management module is coupled to a plurality of peripheral modules and the computer system and the processor are capable of being operated in a working state and power saving states. The method includes the following. When the computer system is operated in the working state and the processor is entered into a lowest power consumption state among the power saving states, states of the peripheral modules are detected to determine whether a specific condition has been matched. If the specific condition is matched, the processor is directed to a control state to control the PLL according to a control state configuration.


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