The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2012
Filed:
Sep. 29, 2008
Applicants:
Qiang Tang, Cupertino, CA (US);
BO Wang, Sunnyvale, CA (US);
Chih-hsin Wang, San Jose, CA (US);
Inventors:
Assignee:
Marvell International Ltd., Hamilton, BM;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
A memory circuit includes a memory array with multi-level cells that are each capable of storing M bits of data, where M is an integer greater than one. A module reads a state of one of the multi-level cells. The module performs at least one of a first erase operation and a first program operation on the one of the multi-level cells for the M bits of data during a first time period.
Tang, Qiang. (2012). System and methods for multi-level nonvolatile memory read, program and erase (U.S. Patent No. 8248848). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8248848
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile