The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2012

Filed:

Mar. 15, 2011
Applicants:

Gary Lai, Palo Alto, CA (US);

Andy L. Lee, San Jose, CA (US);

Ryan Fung, Mississauga, CA;

Vaughn Betz, Toronto, CA;

Marcel A. Leblanc, Sunnyvale, CA (US);

Inventors:

Gary Lai, Palo Alto, CA (US);

Andy L. Lee, San Jose, CA (US);

Ryan Fung, Mississauga, CA;

Vaughn Betz, Toronto, CA;

Marcel A. LeBlanc, Sunnyvale, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01H 71/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

Clock switch-over circuits and methods provide clock signals to clock routing networks. According to one embodiment, a multiplexer selects between a first clock signal and a second clock signal in response to a switch select signal received from a control circuit. A storage circuit stores an enable signal in response to an output clock signal of the multiplexer. A logic circuit transmits the output clock signal of the multiplexer to a clock routing network in response to the enable signal from the storage circuit. At least one signal is transmitted from the clock switch-over circuit to the control circuit.


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