The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2012
Filed:
May. 25, 2010
Kazuo Otsuga, Kokubunji, JP;
Yusuke Kanno, Kodaira, JP;
Kazuo Otsuga, Kokubunji, JP;
Yusuke Kanno, Kodaira, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
In a semiconductor integrated circuit wherein low-threshold-voltage and high-threshold-voltage transistors are disposed mixedly, the operating speed of each transistor can be properly controlled in speed control execution through regulation of a power supply voltage V. The semiconductor integrated circuit comprises an internal circuit and measuring circuits. The internal circuit comprises a low-threshold-voltage MOS transistor and a high-threshold-voltage MOS transistor, and the degree of threshold voltage variation of the low-threshold-voltage MOS transistor is larger than the degree of threshold voltage variation of the high-threshold-voltage MOS transistor. The measuring circuit detects which one of fast, typical, and slow states is taken by both the low-threshold-voltage MOS transistor and the high-threshold-voltage MOS transistor. When the result data detected indicates the fast state, the power supply voltage Vis set to a lower power supply voltage level 'V−ΔV' corresponding to a small variation gradient 'β[V/σ]'. When the result data detected indicates the typical state, the power supply voltage Vis set to an intermediate power supply voltage level “V”. When the result data detected indicates the slow state, the power supply voltage Vis set to a higher power supply voltage level “V+ΔV” corresponding to a large variation gradient “α[V/σ]”.