The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2012
Filed:
Jun. 29, 2011
Yong Liu, Scarborough, ME (US);
Yong Liu, Scarborough, ME (US);
Fairchild Semiconductor Corporation, San Jose, CA (US);
Abstract
Wafer level embedded and stacked die power system-in-package semiconductor devices, and methods for making and using the same, are described. The methods include placing a first side of a substrate frame, which includes through cavity and an adjacent via, on a carrier. A first side of a component selected from an active device and a passive device can be placed on the carrier, within the cavity. A perimeter of the cavity can be attached to a perimeter of the component. Material at a second side of the substrate frame can be removed so the via extends from the frame's first side to the frame's second side. The substrate frame and component can then be removed from the carrier so that routing can be distributed between the first side of the frame and the first side of the component to electrically connect the component with the via. Other embodiments are described.