The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2012

Filed:

Jul. 01, 2008
Applicants:

Timothy J. Dell, Colchester, VT (US);

Kevin C. Gower, LaGrangeville, NY (US);

Warren E. Maule, Cedar Park, TX (US);

Michael R. Trombley, Cary, NC (US);

Inventors:

Timothy J. Dell, Colchester, VT (US);

Kevin C. Gower, LaGrangeville, NY (US);

Warren E. Maule, Cedar Park, TX (US);

Michael R. Trombley, Cary, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A hub device, memory system, and method for providing a cascade interconnect memory system with enhanced reliability. The hub device includes an interface to a high-speed bus for communicating with a memory controller. The memory controller and the hub device are included in a cascade interconnect memory system and the high-speed bus includes bit lanes and one or more clock lanes. The hub device also includes a bi-directional fault signal line in communication with the memory controller and readable by a service interface. The hub device also includes a fault isolation register (FIR) for storing information about failures detected at the hub device, the information including severity levels of the detected failures. In addition, the hub device includes error recovery logic for responding to a failure detected at the hub device.


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