The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2012

Filed:

Dec. 05, 2008
Applicants:

Christophe Favergeon-borgialli, Nice, FR;

Jean-christian Kircher, Roquefort les Pins, FR;

Stéphane Sintes, Cannes, FR;

Inventors:

Christophe Favergeon-Borgialli, Nice, FR;

Jean-Christian Kircher, Roquefort les Pins, FR;

Stéphane Sintes, Cannes, FR;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2006.01); G06F 12/10 (2006.01); G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and systems are provided for geometry-based virtual memory management. The methods and systems use Boolean space algebra operations to manage allocation and deallocation of tiled virtual memory pages in a tiled virtual memory provided by a tiled virtual memory subsystem. A region quadtree may be maintained representing a current allocation state of tiled virtual memory pages within a container. The region quadtree may be used to locate a rectangle or two dimensional (2D) array of unallocated tiled virtual memory pages, and physical memory pages may be mapped to tiled virtual memory pages in the rectangle by updating a lookup table used to translate tiled virtual memory page addresses to physical memory page addresses. A union or intersection of region quadtrees may be performed to generate a new region quadtree representing a new current allocation state of the tiled virtual memory pages.


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