The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2012
Filed:
Jun. 09, 2010
Young Hae Kim, Daejeon, KR;
Sang Hwan Lee, Daejeon, KR;
Young Hae Kim, Daejeon, KR;
Sang Hwan Lee, Daejeon, KR;
Other;
Abstract
A method for manufacturing a hetero-bonded wafer having a large mismatch of thermal expansion coefficient comprises forming a wafer bonding means and an electrical interconnection means on at least one bonding surface of two wafers to be bonded with each other, forming grooves in the bonding surface of one wafer along dicing lines with an interval between the grooves being equal to or an even multiple of a die width, bonding the two wafers at a temperature less than 200° C., thinning a back side of the grooved wafer such that at least a portion of the grooves is exposed, and rebonding the bonded wafer pair at an elevated temperature higher than the first bonding temperature. The method for manufacturing a hetero-bonded wafer can avoid wafer level bow/warp and also reduce debonding and cracking in individual segments induced by thermal stress due to a mismatch of thermal expansion coefficient. Embodiments of the method are useful for wafer level packaging and the fabrication of hybrid devices by heterogeneous wafer bonding.