The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2012

Filed:

Sep. 30, 2009
Applicants:

Ibrahim M. Elfadel, Cortlandt Manor, NY (US);

Lewis William Dewey, Iii, Wappingers Falls, NY (US);

Tarek A. El-moselhy, Cambridge, MA (US);

David J. Widiger, Pflugerville, TX (US);

Patrick M. Williams, Salt Point, NY (US);

Inventors:

Ibrahim M. Elfadel, Cortlandt Manor, NY (US);

Lewis William Dewey, III, Wappingers Falls, NY (US);

Tarek A. El-Moselhy, Cambridge, MA (US);

David J. Widiger, Pflugerville, TX (US);

Patrick M. Williams, Salt Point, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Computing the gradients of capacitances in an integrated circuit chip layout with respect to design and process parameters is described. Included is a shape processing engine in the form of a variational mapping engine and a capacitance calculation engine that includes a gradient calculation engine. The variational mapping engine translates physical parameter variations into variations on the edges of the elementary patterns to which the layout of the integrated circuit is decomposed. The gradient calculation engine computes capacitance gradients by combining information from two sources. The first source consists of pre-existing gradients in a capacitance lookup table. The second source consists of analytical expressions of capacitance correction factors.


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