The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2012

Filed:

Dec. 31, 2008
Applicants:

Mark F. Turner, Longmont, CO (US);

Jeff S. Brown, Fort Collins, CO (US);

Joseph Simko, Whitehall, PA (US);

Miguel A. Vilchis, San Jose, CA (US);

Inventors:

Mark F. Turner, Longmont, CO (US);

Jeff S. Brown, Fort Collins, CO (US);

Joseph Simko, Whitehall, PA (US);

Miguel A. Vilchis, San Jose, CA (US);

Assignee:

LSI Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/455 (2006.01); G01R 27/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method of analyzing noise sensitivity of integrated circuits having at least one memory storage device and a noise sensitivity analyzer. In one embodiment, the noise sensitivity analyzer includes a circuit reservoir, a circuit parser and a circuit evaluator. The circuit reservoir is configured to receive and store a model of a circuit having at least one memory storage device to be analyzed. The circuit parser is configured to identify nodes of the model. The circuit evaluator is configured to apply a large test current to each of the nodes for multiple circuit states of the at least one memory storage device and determine which of the nodes are sensitive nodes.


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