The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2012
Filed:
Jul. 29, 2009
Applicant:
Kenji Nagasaki, Tokyo, JP;
Inventor:
Kenji Nagasaki, Tokyo, JP;
Assignee:
OKI Semiconductor Co., Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01); H01H 31/12 (2006.01);
U.S. Cl.
CPC ...
Abstract
A test element group (TEG) pattern formed of two wiring patterns alternately disposed in a swirl configuration is used for testing an insulation property of a wafer-level chip scale package (WL-CSP) having a micro wiring such as an inductor element. The insulation property of the WL-CSP can be monitored with enhanced accuracy by measuring a resistance value between solder terminals electrically connected to the swirl-shaped TEG pattern.
Nagasaki, Kenji. (2012). Method of testing insulation property of wafer-level chip scale package and teg pattern used in the method (U.S. Patent No. 8237450). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8237450
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile