The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2012

Filed:

May. 06, 2010
Applicants:

Michael C. Freda, Morgan Hill, CA (US);

Ricki D. Williams, Temecula, CA (US);

Inventors:

Michael C. Freda, Morgan Hill, CA (US);

Ricki D. Williams, Temecula, CA (US);

Assignee:

Oracle America, Inc., Redwood Shores, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed circuit board (PCB) is configured to minimize skew between two parallel signal trace portions. The PCB comprises a laminate layer, which includes a fiberglass weave and includes a plastic resin deposited on each face of the fiberglass weave to form a first face and second face of the laminate layer. The fiberglass weave comprises a first set of fiberglass bundles in a first orientation interwoven with a second set of fiberglass bundles in a second orientation. Moreover, the PCB comprises trace a layer that is coupled to the first face of the laminate layer, and includes two or more signal traces. Two parallel trace portions of the two or more signal traces are configured to have a matching orientation and separation distance to a neighboring fiberglass bundle of the fiberglass weave, thereby ensuring that the two parallel trace portions encounter matching dielectric constants from the laminate layer.


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