The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2012
Filed:
Aug. 01, 2008
Lakshmi N. Ramanathan, Chandler, AZ (US);
Craig S. Amrine, Tempe, AZ (US);
Jianwen Xu, Chandler, AZ (US);
Lakshmi N. Ramanathan, Chandler, AZ (US);
Craig S. Amrine, Tempe, AZ (US);
Jianwen Xu, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method () of packaging integrated circuit (IC) dies () includes applying () a laminating material () to a wafer (), and separating () the wafer () into multiple IC dies () such that the laminating material () is applied to back surfaces () of the IC dies (). Each of the IC dies () is positioned () with an active surface () facing a support substrate (). An encapsulant layer () is formed () overlying the laminating material () and the back surfaces () of the IC dies () from a molding compound (). The molding compound () and the laminating material () are removed from the back surfaces () of the IC dies () to form () openings () exposing the back surfaces (). Conductive material () is placed in the openings () and functions as a heat sink and/or a ground for the IC dies ().