The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2012

Filed:

Jul. 01, 2008
Applicants:

Peter Buchmann, Wald, CH;

Kevin C. Gower, LaGrangeville, NY (US);

Robert J. Reese, Austin, TX (US);

Martin L. Schmatz, Rueschlikon, CH;

Michael R. Trombley, Cary, NC (US);

Inventors:

Peter Buchmann, Wald, CH;

Kevin C. Gower, LaGrangeville, NY (US);

Robert J. Reese, Austin, TX (US);

Martin L. Schmatz, Rueschlikon, CH;

Michael R. Trombley, Cary, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A communication interface device, system, method, and design structure for error correcting code (ECC) protected quasi-static bit communication (SBC) on a high-speed bus are provided. The communication interface device includes high-speed sampling logic to capture high-speed data from the high-speed bus using a high-speed sampling clock and SBC sampling logic to capture SBC samples from the high-speed bus using an SBC sampling clock. The SBC sampling clock is slower than the high-speed sampling clock. The communication interface device also includes an SBC finite state machine (FSM) to detect a received SBC command in response to a static pattern persisting for a predetermined number of the SBC samples and command decoding logic to decode the received SBC command.


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