The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2012

Filed:

Jun. 02, 2010
Applicants:

Yuen H. Chan, Poughkeepsie, NY (US);

Antonio R. Pelella, Highland Falls, NY (US);

Richard E. Serton, Clinton, NY (US);

Arthur Tuminaro, Lagrangeville, NY (US);

Inventors:

Yuen H. Chan, Poughkeepsie, NY (US);

Antonio R. Pelella, Highland Falls, NY (US);

Richard E. Serton, Clinton, NY (US);

Arthur Tuminaro, Lagrangeville, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A compare circuit for comparing a first data word with a second data word includes a plurality of sub-circuits, each having a two-bit static compare stage and a dynamic complex logic stage; a dynamic compare node responsive to respective outputs of the sub-circuits; and an output latch that captures a comparison result in accordance with a logic state of the dynamic compare node. In an exemplary embodiment, a local clock generator provides a single controlling clock signal for clocking the output latch, precharging of the dynamic compare node, and clocking of the dynamic complex logic stage of the sub-circuits.


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