The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2012

Filed:

Oct. 19, 2009
Applicants:

Shuhei Abe, Tokyo, JP;

Akira Ikeuchi, Tokyo, JP;

Inventors:

Shuhei Abe, Tokyo, JP;

Akira Ikeuchi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/00 (2006.01); H01M 10/42 (2006.01); H03K 19/096 (2006.01);
U.S. Cl.
CPC ...
Abstract

A communication device includes a first JK flip-flop (FF) outputting a first output signal in response to a first input signal at a J-input and a reversed signal of the first input signal at a K-input, and a second JK FF outputting a second output signal in response to a second input signal at a J-input and a reversed signal of the second input signal at a K-input. A clock input to a NAND gate () is replaced by a reversed signal of a Q-output of the second JK FF. A clock input to a NAND gate () is replaced by the reversed signal of the second input signal. A clock input to a NAND gate () is replaced by a reversed signal of a Q-output of the first JK FF. A clock input to a NAND gate () is replaced by the reversed signal of the first input signal.


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