The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2012

Filed:

Jan. 21, 2011
Applicants:

Young-woo Park, Seoul, KR;

Jung-dal Choi, Gyeonggi-do, KR;

Jae-sung Sim, Gyeonggi-do, KR;

Inventors:

Young-Woo Park, Seoul, KR;

Jung-Dal Choi, Gyeonggi-do, KR;

Jae-Sung Sim, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are methods for fabricating semiconductor devices. A method may include forming a device isolation layer to define active regions on a semiconductor substrate. The active regions may protrude above an upper surface of the device isolation layer. The method may also include forming tunnel insulating layers on upper and side surfaces of corresponding ones of the active regions. The method may further include forming charge storage patterns on corresponding ones of the tunnel insulating layers. The charge storage patterns may be separated from each other. The method may also include forming a blocking insulating layer on the charge storage patterns and the device isolation layer. The method may further include forming a gate electrode on the blocking insulating layer. The blocking insulating layer may cover the device isolation layer such that the gate electrode is precluded from contact with the device isolation layer and the tunnel insulating layers.


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