The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2012

Filed:

Jan. 28, 2010
Applicants:

Robert J. Gauthier, Jr., Hinesburg, VT (US);

Bradford L. Hunter, Austin, TX (US);

Amol A. Joshi, Essex Junction, VT (US);

Junjun LI, Williston, VT (US);

Gregory Joseph Schroer, Williston, VT (US);

Inventors:

Robert J. Gauthier, Jr., Hinesburg, VT (US);

Bradford L. Hunter, Austin, TX (US);

Amol A. Joshi, Essex Junction, VT (US);

Junjun Li, Williston, VT (US);

Gregory Joseph Schroer, Williston, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method, apparatus and program product are provided for simulating a circuit. A plurality of elements of the circuit is represented by device models including pass/fail criteria. A circuit simulation program is executed on a hardware implemented processor where the circuit simulation program is configured to obtain simulation results from the device models in response to applied parameters. The circuit simulation program identifies a failure of one or more of the plurality of elements of the circuit based on the pass/fail criteria of the device models. The circuit simulation program is further configured to output the failures during simulation of the one or more of the plurality of elements that are identified in response to the applied parameters.


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