The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2012
Filed:
Feb. 20, 2009
Karl Shieh, Fremont, CA (US);
Michael A. Cookson, Fremont, CA (US);
Norma B. Riley, Durham, CA (US);
Donald Rex Wright, Cupertino, CA (US);
Joseph John Fatula, Jr., San Jose, CA (US);
Karl Shieh, Fremont, CA (US);
Michael A. Cookson, Fremont, CA (US);
Norma B. Riley, Durham, CA (US);
Donald Rex Wright, Cupertino, CA (US);
Joseph John Fatula, Jr., San Jose, CA (US);
Muratec Automation Co., Ltd., Kyoto, JP;
Abstract
A semiconductor fabrication facility (fab) configuration module is defined to virtually model physical systems and attributes of a fab. A data acquisition module is defined to interface with the physical systems of the fab and gather operational data from the physical systems. A visualizer module is defined to collect and aggregate the operational data gathered from the physical systems. The visualizer module is further defined to process the operational data into a format suitable for visual rendering. The processed operational data is displayed within a visual context of the fab in a graphical user interface controlled by the visualizer module. An analyzer module is defined to analyze data collected by the visualizer module and to resolve queries regarding fab performance. An optimizer module is defined to control systems within the fab in response to data collected by the visualizer module, data generated by the analyzer module, or a combination thereof.