The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2012
Filed:
Oct. 05, 2010
Applicant:
De-yu Kao, Taipei, TW;
Inventor:
De-Yu Kao, Taipei, TW;
Assignee:
Princeton Technology Corporation, Xindian Dist., New Taipei, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for balancing clock signals in an IC layout includes obtaining a data-flow information of the IC, selecting a first data-flow according to the dataflow information, and synchronizing a first clock signal from a first register and a second clock signal from a second register involved in the first data-flow. The data processed by the first register is directly transmitted to the second register or transmitted through a combinational logic circuit to the second register. The first data-flow is not related to other data-flows included in the data-flow information.