The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2012
Filed:
Dec. 10, 2008
Bong-jun Lee, Seoul, KR;
Byeong-jae Ahn, Suwon-si, KR;
Yeo-geon Yoon, Seoul, KR;
Hong-woo Lee, Cheonan-si, KR;
Hyuk-jin Kim, Cheonan-si, KR;
Jong-oh Kim, Cheonan-si, KR;
Gyu-tae Kim, Cheonan-si, KR;
Bong-Jun Lee, Seoul, KR;
Byeong-Jae Ahn, Suwon-si, KR;
Yeo-Geon Yoon, Seoul, KR;
Hong-Woo Lee, Cheonan-si, KR;
Hyuk-Jin Kim, Cheonan-si, KR;
Jong-Oh Kim, Cheonan-si, KR;
Gyu-Tae Kim, Cheonan-si, KR;
Abstract
A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.