The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2012

Filed:

Feb. 14, 2008
Applicants:

Daishi Ueno, Minato-ku, JP;

Taro Wada, Minato-ku, JP;

Masahiro Funayama, Minato-ku, JP;

Yoshikatsu Kuroda, Komaki, JP;

Yuichi Kondo, Kobe, JP;

Shinichi Kobayashi, Nagoya, JP;

Koji Nakano, Nagoya, JP;

Kenj Fujiwara, Kobe, JP;

Teruo Takeshita, Minato-ku, JP;

Inventors:

Daishi Ueno, Minato-ku, JP;

Taro Wada, Minato-ku, JP;

Masahiro Funayama, Minato-ku, JP;

Yoshikatsu Kuroda, Komaki, JP;

Yuichi Kondo, Kobe, JP;

Shinichi Kobayashi, Nagoya, JP;

Koji Nakano, Nagoya, JP;

Kenj Fujiwara, Kobe, JP;

Teruo Takeshita, Minato-ku, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

An object is to provide a semiconductor element module having high reliability, superior electric connection and thermal connection and capable of securing sufficient cooling performance, and also to provide a method for manufacturing the same. The semiconductor element module () comprises an IGBT () and a diode () having electrodes formed on surfaces of both sides thereof, a ceramic substrate (), in which thermal conductivity is high, having wiring circuit layers () formed on the surface thereof for bonding to surfaces of one side of the IGBT () and the diode (), a ceramic substrate (), in which thermal conductivity is high, having a wiring circuit layer () formed on the surface thereof for bonding to surfaces of other side of the IGBT () and the diode (), and a sealing member () which is sandwiched between the outer edges of the ceramic substrates () for sealing inside thereof; and these members are bonded by room-temperature bonding.


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