The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2012

Filed:

Feb. 02, 2010
Applicants:

Dinesh D. Gaitonde, Fremont, CA (US);

Steven LI, San Jose, CA (US);

Inventors:

Dinesh D. Gaitonde, Fremont, CA (US);

Steven Li, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method performed by a system comprising a processor and a memory can include performing a global placement of a circuit design for a target programmable integrated circuit (IC) and clustering the circuit design using a selected size of cluster regions according to control sets identified within the circuit design. The method further can include determining a legalized placement of the clustered circuit design by solving a minimum cost network flow problem for the selected size of the cluster regions and the target programmable IC and assigning components to sites of the target programmable IC according to the legalized placement. The circuit design specifying the legalized placement can be stored within the memory.


Find Patent Forward Citations

Loading…