The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2012
Filed:
Nov. 17, 2005
Ron Bercovich, Kfar-Saba, IL;
Odi Dahan, Oranit, IL;
Norman Goldstein, Ariel, IL;
Yehuda Nowogrodski, D.N. SDE Gat, IL;
Ron Bercovich, Kfar-Saba, IL;
Odi Dahan, Oranit, IL;
Norman Goldstein, Ariel, IL;
Yehuda Nowogrodski, D.N. SDE Gat, IL;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A device that includes multiple processors that are connected to multiple level-one cache units. The device also includes a multi-port high-level cache unit that includes a first modular interconnect, a second modular interconnect, multiple high-level cache paths; whereas the multiple high-level cache paths comprise multiple concurrently accessible interleaved high-level cache units. Conveniently, the device also includes at least one non-cacheable path. A method for retrieving information from a cache that includes: concurrently receiving, by a first modular interconnect of a multiple-port high-level cache unit, requests to retrieve information. The method is characterized by providing information from at least two paths out of multiple high-level cache paths if at least two high-level cache hit occurs, and providing information via a second modular interconnect if a high-level cache miss occurs.