The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2012
Filed:
Dec. 23, 2008
Yong-jun Lee, Anyang-si, KR;
Kwang-jin Lee, Hwaseong-si, KR;
Taek-sung Kim, Yongin-si, KR;
Kwang-ho Kim, Hwaseong-si, KR;
Woo-yeong Cho, Suwon-si, KR;
Hyun-ho Choi, GeongGi-do, KR;
Hye Jin Kim, Seoul, KR;
Yong-Jun Lee, Anyang-si, KR;
Kwang-Jin Lee, Hwaseong-si, KR;
Taek-Sung Kim, Yongin-si, KR;
Kwang-Ho Kim, Hwaseong-si, KR;
Woo-Yeong Cho, Suwon-si, KR;
Hyun-Ho Choi, GeongGi-do, KR;
Hye Jin Kim, Seoul, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.