The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2012

Filed:

Apr. 17, 2007
Applicants:

Sanjay Garg, Bangalore, IN;

Bipasha Ghosh, Bangalore, IN;

Nikhil Balram, Mountain View, CA (US);

Kaip Sridhar, Bangalore, IN;

Shilpi Sahu, Bangalore, IN;

Richard Taylor, Phoenix, AZ (US);

Gwyn Edwards, Mountain View, CA (US);

Loren Tomasi, Chandler, AZ (US);

Vipin Namboodiri, Bangalore, IN;

Inventors:

Sanjay Garg, Bangalore, IN;

Bipasha Ghosh, Bangalore, IN;

Nikhil Balram, Mountain View, CA (US);

Kaip Sridhar, Bangalore, IN;

Shilpi Sahu, Bangalore, IN;

Richard Taylor, Phoenix, AZ (US);

Gwyn Edwards, Mountain View, CA (US);

Loren Tomasi, Chandler, AZ (US);

Vipin Namboodiri, Bangalore, IN;

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 7/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

A scaler positioning module may receive a video signal selected from among a plurality of video signals. The scaler positioning module may include scaler slots for arranging the signal path of the selected video signal through at least one scaler in the scaler positioning module. The scaler slots may enable the scaler positioning module to operate in three modes. The three modes may enable the scaler positioning module to output scaled data without memory operations, scale prior to a memory write, and scale after a memory read. A blank time optimizer (BTO) may receive data from the scaler positioning module at a first clock rate and distributed memory accesses based on a bandwidth requirement determination. The BTO may access memory at a second clock rate. The second clock rate may be slower than the first which may reduce memory bandwidth and enable another video signal to access memory faster.


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