The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2012
Filed:
Mar. 26, 2010
Satoshi Tanaka, Tokyo, JP;
Kyoichi Takahashi, Tokyo, JP;
Masatoshi Hase, Kodaira, JP;
Masahiro Ito, Tachikawa, JP;
Satoshi Tanaka, Tokyo, JP;
Kyoichi Takahashi, Tokyo, JP;
Masatoshi Hase, Kodaira, JP;
Masahiro Ito, Tachikawa, JP;
Murata Manufacturing Co., Ltd., Kyoto, JP;
Abstract
To provide a bias circuit for gain control that can reduce gain variation at low-power output, facilitate setting of output power, and is unlikely to be affected by variation in element values and variations among products. Use in an HPA having three bias circuits serially-connected is assumed. Current of the third bias circuit is varied with a square-law characteristic. The square-law characteristic is amplified by a buffer amplifier including a linear amplifier and a peripheral circuit thereof. Output current of the third bias circuit varies depending on a current drivability coefficient of the diode-connected FET branched from the connection point between a constant current source and the linear amplifier. The output current of the third bias circuit is controlled by providing a circuit that draws a certain amount of current from the current flowing in the FET.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile