Esd protection circuit

Abstract

A multi-fingered gate transistor is disclosed that is formed in a substrate of one conductivity type overlying a well of a second conductivity type. Ohmic contact to the well is made by an implanted region of the second conductivity type that circumscribes the multi-fingered gate transistor. Ohmic contact to the substrate is made by four taps located on four sides of the multi-fingered gate structure between the gate structure and the well contact. Floating wells are located on opposite sides of the gate structure between two of the substrate taps and the ends of the gates to isolate these substrate taps and force current flow in the substrate under the multifingered gate transistor to be substantially perpendicular to the direction in which the gate fingers extend. This increases the potential difference between these substrate regions and adjacent source regions in the multi-fingered gate transistor, thereby aiding the triggering of the parasitic bipolar transistors under adjacent gate fingers into a high current state. This also reduces the differences among the potentials in the substrate under the different source regions and thus improves the uniformity of turn-on of the parasitic bipolar transistors. As a result, it is not necessary to maintain as great a distance from the isolated substrate taps as in prior art devices. Moreover, because the floating wells significantly improve the performance of the ESD protection structure, some of this performance improvement may be exchanged for decreases in the size of the protection structure.