The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2012
Filed:
Oct. 02, 2007
Ching-te K. Chuang, South Salem, NY (US);
Fadi H. Gebara, Austin, TX (US);
Keunwoo Kim, Somers, NY (US);
Jente Benedict Kuang, Austin, TX (US);
Hung C. Ngo, Austin, TX (US);
Ching-Te K. Chuang, South Salem, NY (US);
Fadi H. Gebara, Austin, TX (US);
Keunwoo Kim, Somers, NY (US);
Jente Benedict Kuang, Austin, TX (US);
Hung C. Ngo, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A memory circuit includes a plurality of bit line structures, a plurality of word line structures intersecting the plurality of bit line structures to form a plurality of cell locations; and a plurality of cells located at the plurality of cell locations. Each of the cells is selectively coupled to a corresponding one of the bit line structures under control of a corresponding one of the word line structures, and each of the cells in turn includes a logical storage element having at least a first n-type field effect transistor and at least a first p-type field effect transistor. The at least first n-type field effect transistor is formed with a relatively thick buried oxide layer sized to reduce capacitance of the bit line structures, and the at least first p-type field effect transistor is formed with a relatively thin buried oxide layer.