The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2012

Filed:

Dec. 29, 2009
Applicants:

Valentina Nardone, Avezzano, IT;

Stefania Stucchi, Cornate D'Adda, IT;

Luca Ciccarelli, Rimini, IT;

Lorenzo Calí, Besana Brianza, IT;

Inventors:

Valentina Nardone, Avezzano, IT;

Stefania Stucchi, Cornate D'Adda, IT;

Luca Ciccarelli, Rimini, IT;

Lorenzo Calí, Besana Brianza, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza (MI), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 19/00 (2006.01); G01R 31/28 (2006.01); H03K 19/173 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A System-on-Chip (SoC) may include logic blocks connected to each other and to external connections, and a hardware debug infrastructure logic connected to the logic blocks and for performing functional changes to a design layout of the SoC. The hardware debug infrastructure logic may include software re-configurable modules based upon the logic blocks obtained from substituting a mask programmable ECO base cell configured as a functional logic cell for a logic cell in the design layout.


Find Patent Forward Citations

Loading…