The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2012
Filed:
Mar. 31, 2010
Pavel Poplevine, Burlingame, CA (US);
Ernes Ho, Sunnyvale, CA (US);
Hengyang (James) Lin, San Ramon, CA (US);
Andrew J. Franklin, Santa Clara, CA (US);
Pavel Poplevine, Burlingame, CA (US);
Ernes Ho, Sunnyvale, CA (US);
Hengyang (James) Lin, San Ramon, CA (US);
Andrew J. Franklin, Santa Clara, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A non-volatile memory (NVM) cell structure comprises a PMOS program transistor having source, drain and bulk region electrodes and a gate electrode that is connected to a data storage node; an NMOS control transistor having source, drain and bulk region electrodes that are commonly-connected to receive a control voltage and a gate electrode that is connected to the data storage node; a PMOS erase transistor having source, drain and bulk region electrodes that are commonly-connected to receive an erase voltage and a gate electrode that is connected to the data storage node; and an NMOS read transistor having source, drain and bulk region electrodes and a gate electrode connected to the data storage node.