The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2012
Filed:
Dec. 17, 2007
Byung-soo Eun, Seoul, KR;
Byung-Soo Eun, Seoul, KR;
Hynix Semiconductor Inc., Icheon-si, KR;
Abstract
Provided is a method for forming an isolation layer in a semiconductor device. In the method, a trench is formed in a semiconductor substrate, and a liner layer is formed on an exposed surface of the trench. A flowable insulation layer is formed to fill the trench. The flowable insulation layer is recessed. A buffer layer is formed on a portion of the liner layer that is formed on a sidewall of the trench and exposed after the flowable insulation layer is recessed. The buffer layer is etched to smoothen a rough portion of the liner layer that is formed when the flowable insulation layer is recessed. A buried insulation layer is deposited in the trench.