Suspending write back of valid data in pipeline register to register file and cancelling when overwritten by subsequent instruction

Abstract

A pipeline processor has a first stage to read data from a general purpose register unit, a second stage to execute instruction, and a third stage to write back the data into the general purpose register unit. A pipeline register retains data obtained by executing the second stage. The pipeline register stores a data validity flag. A WRITE suspension unit suspends execution of writing the retained data into a general purpose register of the general purpose register unit until the retained data is rewritten by a subsequent instruction, even if the data validity flag indicates 'valid.' A data invalidation unit cancels the execution of writing the data retained in the pipeline register into the general purpose register into which the data is to be written by a preceding instruction and invalidates the retained data, when data is written into the general purpose register by the subsequent instruction.