The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2012

Filed:

Jun. 08, 2010
Applicants:

Toyoaki Uo, Kanagawa-ken, JP;

Hisami Saitou, Kanagawa-ken, JP;

Atsushi Iwata, Hiroshima-ken, JP;

Yoshitaka Murasaka, Hiroshima-ken, JP;

Toshifumi Imamura, Hiroshima-ken, JP;

Inventors:

Toyoaki Uo, Kanagawa-ken, JP;

Hisami Saitou, Kanagawa-ken, JP;

Atsushi Iwata, Hiroshima-ken, JP;

Yoshitaka Murasaka, Hiroshima-ken, JP;

Toshifumi Imamura, Hiroshima-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An analog-to-digital converter includes a first switch circuit, a first integrator, a second switch circuit, a second integrator, a quantizer and a digital-to-analog converter. The first switch circuit receives an external analog signal, outputs the analog signal in reverse phase, and outputs the analog signal in positive phase. The first integrator receives and integrates the analog signal with cross-coupling. The second switch circuit outputs an output of the first integrator and a common mode output potential of the first integrator. The second integrator samples and integrates an output of the second switch circuit. The quantizer single-bit-quantizes an output of the second integrator to provide the output as a digital signal output. The digital-to-analog converter receives an output of the quantizer and provides the output as an analog signal output. Each of the first and second integrators receives and integrates an output of the digital-to-analog converter with cross-coupling.


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