Clock circuit with clock transfer capability and method

Abstract

An apparatus including a multiplexer configured to provide an output clock selected from a source clock, a destination clock, and a transition clock is provided. The apparatus further includes a phase difference calculation module configured to calculate a phase difference between the source clock and the destination clock and a clock generation module configured to generate a plurality of clocks. The apparatus further includes a clock selection module configured to select one of the plurality of clocks as the transition clock and a control circuit configured to provide: (1) a signal to the clock selection module for selecting one of the plurality of clocks as the transition clock based on the phase difference between the source clock and the destination clock and (2) a signal to the multiplexer to provide as the output clock one of the source clock, the destination clock, or the transition clock.