The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2012
Filed:
Jul. 01, 2010
Applicant:
Susumu Fujimura, Yokohama, JP;
Inventor:
Susumu Fujimura, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
In an embodiment, a semiconductor memory device including a cell array with NAND strings arranged therein, wherein the device has such a program mode that bit lines and cell's channels of the NAND strings coupled thereto are initially charged in accordance with program data, and then program voltage is applied to memory cells selected in the cell array. In the program mode, a certain bit line and a program-inhibited cell's channel coupled thereto, which are initially charged to Vdd, are boosted to be higher than Vdd by capacitive coupling from the cell source line prior to the program voltage application.