The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2012
Filed:
Mar. 06, 2008
Markus Gerhard Andreas Muller, Grenoble, FR;
Philippe Coronel, Barraux, FR;
Markus Gerhard Andreas Muller, Grenoble, FR;
Philippe Coronel, Barraux, FR;
NXP B.V., Eindhoven, NL;
ST Microelectronics (Crolles 2) SAS, Crolles, FR;
Abstract
A FinFET () comprises a fin-shaped layer-section () of a single-crystalline active semiconductor layer () extending on an insulating substrate layer () along a longitudinal fin direction between, a source layer-section (), and a drain layer-section () of the single-crystalline active semiconductor layer (). Furthermore, two separate gate-electrode layers () are provided, which do not form sections of the single-crystalline active semiconductor layer, each of the gate-electrode layers facing one of the opposite side faces of the fin-shaped layer-section (). Each gate-electrode layer is connected with a respective separate gate contact (). The gate-electrode layers, as seen in a cross-sectional view of a plane that is perpendicular to the longitudinal fin-direction, are arranged on the substrate layer () between the respective side face of the fin-shaped layer section and a respective contact-post layer section () of the single-crystalline semiconductor layer ().