The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2012

Filed:

Sep. 24, 2009
Applicant:

Gang Peter Fang, Plano, TX (US);

Inventor:

Gang Peter Fang, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 19/00 (2011.01);
U.S. Cl.
CPC ...
Abstract

Simulation method and system for analyzing the stability of a modeled electronic circuit. Simulation of the transient response to a desired input stimulus is performed in a piece-wise fashion, in a sequence of transient time points. At one or more user-specified time points ('tpunch' points) within the transient interval, the state of the circuit in the transient response at that time point is applied to the model as if it were a DC operating point, and the small-signal stability of the circuit under those conditions is analyzed. Transient instability of the circuit is thus discovered by way of simulation, allowing the designer to determine the cause and cure of that instability.


Find Patent Forward Citations

Fang, Gang. (2012). Small-signal stability analysis at transient time points of integrated circuit simulation (U.S. Patent No. 8200461). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8200461

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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