The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2012
Filed:
Sep. 24, 2010
Walter Novosel, New Wilmington, PA (US);
Ethan Sieg, Hermitage, PA (US);
Timothy Fiscus, Hermitage, PA (US);
David Novosel, New Wilmington, PA (US);
Elaine Novosel, Legal Representative, West Middlesex, PA (US);
Walter Novosel, New Wilmington, PA (US);
Ethan Sieg, Hermitage, PA (US);
Timothy Fiscus, Hermitage, PA (US);
David Novosel, New Wilmington, PA (US);
Elaine Novosel, legal representative, West Middlesex, PA (US);
Novocell Semiconductor, Inc., Hermitage, PA (US);
Abstract
A multiple time programmable non-volatile memory element and associated programming methods that allow for integration of non-volatile memory with other CMOS integrated circuitry utilizing standard CMOS processing. The multiple time programmable non-volatile memory element includes a capacitor, an access transistor that is electrically coupled to the capacitor at a connection node, and a plurality of one time programmable non-volatile memory cells. Each of the plurality of one time programmable non-volatile memory cells is electrically coupled to the connection node and includes a select transistor that is electrically coupled to an antifuse element. The antifuse element is configured to have changed resistivity in response to one or more voltage pulses received at the connection node, the change in resistivity representing a change in logic state.