The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2012

Filed:

Jan. 05, 2010
Applicants:

Dong-hoon Lee, Seoul, KR;

Do-hyun Kim, Seongnam-si, KR;

Chang-oh Jeong, Suwon-si, KR;

O-sung Seo, Seoul, KR;

Xin-xing LI, Yongin-si, KR;

Inventors:

Dong-Hoon Lee, Seoul, KR;

Do-Hyun Kim, Seongnam-si, KR;

Chang-Oh Jeong, Suwon-si, KR;

O-Sung Seo, Seoul, KR;

Xin-Xing Li, Yongin-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
Abstract

A thin film transistor array panel includes an insulating substrate. A gate line is formed on the insulating substrate and has a gate electrode. A gate insulating layer is formed on the gate line. A semiconductor layer is formed on the gate insulating layer and overlaps the gate electrode. Diffusion barriers are formed on the semiconductor layer and contain nitrogen. A data line crosses the gate line and has a source electrode partially contacting the diffusion barriers and a drain electrode partially contacting the diffusion barriers and facing the source electrode. The drain electrode is on the gate electrode. A pixel electrode is electrically connected to the drain electrode.


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