The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2012

Filed:

Jul. 01, 2009
Applicants:

Michael P. Hohmuth, Dresden, DE;

Uwe M. Dannowski, Moritzburg, DE;

Sebastian Biemueller, Dresden, DE;

David S. Christie, Austin, TX (US);

Stephan Diestelhorst, Dresden, DE;

Thomas Friebel, Dresden, DE;

Inventors:

Michael P. Hohmuth, Dresden, DE;

Uwe M. Dannowski, Moritzburg, DE;

Sebastian Biemueller, Dresden, DE;

David S. Christie, Austin, TX (US);

Stephan Diestelhorst, Dresden, DE;

Thomas Friebel, Dresden, DE;

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A processor including a virtual memory paging mechanism. The virtual memory paging mechanism enables an operating system operating on the processor to use pages of a first size and a second size, the second size being greater than the first size. The mechanism further enables the operating system to use superpages including two or more contiguous pages of the first size. The size of a superpage is less than the second size. The processor further includes a page table having a separate entry for each of the pages included in each superpage. The operating system accesses each superpage using a single virtual address. The mechanism interprets a single entry in a translation lookaside buffer TLB as referring to a region of memory comprising a set of pages that correspond to a superpage in response to detecting a superpage enable indicator associated with the entry in the TLB is asserted.


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