Transponder circuit with double clock extractor unit

Abstract

The transponder circuit comprises a double clock extractor unit (), an antenna coil connected to a modulator rectifier block to supply a rectified supply voltage on the basis of a picked up radio-frequency signal, and a control logic receiving a clock signal (CLK) of the double clock extractor unit. The control logic supplies a modulation signal (MOD) to the modulator rectifier block as well as to the double clock extractor unit. A terminal (B) of the antenna coil is connected to the double clock extractor unit, which comprises a first sensitive clock extractor, which is a comparator () with a sensitivity threshold defined by a low reference voltage (Vref), and a second clock extractor, which consists of two successive inverters (). The unit also comprises a multiplexer () to receive as input the clock signal (CLK_ON) of the first clock extractor () and the clock signal (CLK_OFF) of the second inverter clock extractor (), and to supply as output one of the selected clock signals (CLK). The unit additionally comprises a flip-flop (), which receives as input the modulation signal and a combined signal depending on the modulation signal and the clock signal (CLK_OFF) of the second clock extractor. The flipflop supplies as output a selection signal (SEL) to the multiplexer depending on the status of each of the signals at the input of the flip-flop.