The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2012
Filed:
Jun. 29, 2009
Hiroyuki Takahashi, Kasugai, JP;
Chie Honda, Kurashiki, JP;
Tatsuya Kato, Aichi, JP;
Tomohide Yamada, Komaki, JP;
Shigeru Taga, Aichi, JP;
Hiroyuki Takahashi, Kasugai, JP;
Chie Honda, Kurashiki, JP;
Tatsuya Kato, Aichi, JP;
Tomohide Yamada, Komaki, JP;
Shigeru Taga, Aichi, JP;
NGK Spark Plug Co., Ltd., Nagoya, JP;
Abstract
An electrical testing substrate unit includes a multi-layer ceramic substrate formed of mullite and a borosilicate glass as predominant ceramic components. In the multi-layer ceramic substrate, the borosilicate glass contains an alkali metal oxide in an amount of 0.5 to 1.5 mass %. The multi-layer ceramic substrate has a mean coefficient of linear thermal expansion having a value of 3.0 to 4.0 ppm/° C. between −50° C. and 150° C. A thermal expansion coefficient, α1, of the multi-layer ceramic substrate as determined at a particular temperature and a thermal expansion coefficient, α2, of a to-be-tested silicon wafer as determined at the same temperature silicon satisfy a relation: 0 ppm/° C.<α1−α2≦2.5 ppm/° C. through the temperature range of −50° C. to 150° C. Electrodes are formed on a surface of the multi-layer ceramic substrate.