The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2012

Filed:

Aug. 28, 2008
Applicants:

Hong-sil Jeong, Seoul, KR;

Se-ho Myung, Suwon-si, KR;

Jae-yoel Kim, Suwon-si, KR;

Sung-ryul Yun, Suwon-si, KR;

Hak-ju Lee, Incheon, KR;

Kyeongcheol Yang, Pohang-si, KR;

Hyeon-koo Yang, Pohang-si, KR;

Dong-min Shin, Seoul, KR;

Kyung-joong Kim, Pohang-si, KR;

Inventors:

Hong-Sil Jeong, Seoul, KR;

Se-Ho Myung, Suwon-si, KR;

Jae-Yoel Kim, Suwon-si, KR;

Sung-Ryul Yun, Suwon-si, KR;

Hak-Ju Lee, Incheon, KR;

Kyeongcheol Yang, Pohang-si, KR;

Hyeon-Koo Yang, Pohang-si, KR;

Dong-Min Shin, Seoul, KR;

Kyung-Joong Kim, Pohang-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus for transmitting data in a communication system using a Low Density Parity Check (LDPC) matrix is provided. The apparatus includes an interleaver for interleaving a descending bit-ordered codeword having a predetermined size and in accordance with a predetermined modulation scheme; and a bit mapper for mapping codeword bits constituting the interleaved codeword in accordance with a predetermined mapping scheme that takes into account degrees of the codeword bits and reliability characteristics of modulation symbol-constituting bits based on the predetermined modulation scheme.


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