The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2012

Filed:

Aug. 24, 2007
Applicant:

Tero Vallius, Oulu, FI;

Inventor:

Tero Vallius, Oulu, FI;

Assignee:

Atomia Oy, , FI;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

An arbitrator circuit for accessing a bus comprises a logic gate arrangement (), one input of which is coupled to a first bus line. The circuit comprises a switching arrangement (). As a response to a control signal the switching arrangement disconnects a first half () of the first bus line from a second half (), and couples the second half () to a first fixed potential. A second bus line () is decoupled from the logic gate arrangement (), which is coupled to receive a second fixed potential. The second bus line is coupled to the first fixed potential. Two sources are available for providing the control signal to the switching arrangement (). One of them is the output of the logic gate arrangement ().


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