The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2012

Filed:

Feb. 25, 2011
Applicants:

Young-yoon Woo, Hwaseong-si, KR;

Han-seok Kim, Seoul, KR;

Dong-geun Lee, Hwaseong-si, KR;

Bum-man Kim, Pohang-si, KR;

Jung-hwan Moon, Pohang-si, KR;

Inventors:

Young-Yoon Woo, Hwaseong-si, KR;

Han-Seok Kim, Seoul, KR;

Dong-Geun Lee, Hwaseong-si, KR;

Bum-Man Kim, Pohang-si, KR;

Jung-Hwan Moon, Pohang-si, KR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/68 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus improve the performance of a carrier amplifier in a Doherty amplifier. The Doherty amplifier includes a power divider, a carrier amplifier, at least one peaking amplifier, offset lines, and a Doherty circuit. The power divider provides a power signal to each of the carrier amplifier and the at least one peaking amplifier. The carrier amplifier amplifies power of a signal inputted from the power divider. The at least one peaking amplifier amplifies power of a signal inputted from the power divider. The offset lines control a load impedance when the at least one peaking amplifier does not operate. When the at least one peaking amplifier does not operate, the Doherty circuit generates the load impedance of the carrier amplifier that is larger than twice a load impedance at the maximum output power of the carrier amplifier.


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