The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2012
Filed:
Oct. 06, 2009
Chih-yuan Hou, Chiayi, TW;
Chih-Yuan Hou, Chiayi, TW;
Au Optronics Corporation, Hsinchu, TW;
Abstract
A fabricating method of a semiconductor stacking layer includes following steps. First, an amorphous silicon (a-Si) layer is formed on a substrate. Surface treatment is then performed on a surface of the a-Si layer. After that, a doped microcrystalline silicon (μc-Si) layer is formed on the treated surface of the a-Si layer, wherein interface defects existing between the a-Si layer and the doped μc-Si layer occupy an area in a cross-sectional region having a width of 1.5 micrometers and a thickness of 40 nanometers, and a ratio of the occupied area in the cross-sectional region is equal to or less than 10%. The method of fabricating the semiconductor stacking layer can be applied to a fabrication process of a semiconductor device to effectively reduce the interface defects of the semiconductor stacking layer.